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1

PERSUASION || Classical Rhetoric and the Modern Trial Lawyer

Paul Mark Sandler, JoAnne A. Epps and Ronald J. Waicukauski

Journal:

Year:

2010

Language:

english

File:

PDF, 1.24 MB

english, 2010

2

[IEEE Comput. Soc. Press Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) - Monterey, CA, USA (27 April-1 May 1997)] Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) - Using ATPG for clock rules checking in complex scan designs

Wohl, P., Waicukauski, J.

Year:

1997

Language:

english

File:

PDF, 756 KB

english, 1997

3

[IEEE 2003. Design Automation Conference - Anaheim, CA, USA (2-6 June 2003)] Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) - Efficient compression and application of deterministic patterns in a logic BIST architecture

Wohl, P., Waicukauski, J.A., Patel, S., Amin, M.B.

Year:

2003

Language:

english

File:

PDF, 468 KB

english, 2003

4

[IEEE 2002 International Test Conference - Baltimore, MD, USA (7-10 Oct. 2002)] Proceedings. International Test Conference - Scan test data volume reduction in multi-clocked designs with safe capture technique

Jain, V., Waicukauski, J.

Year:

2002

Language:

english

File:

PDF, 383 KB

english, 2002

5

[ACM Press the 40th conference - Anaheim, CA, USA (2003.06.02-2003.06.06)] Proceedings of the 40th conference on Design automation - DAC '03 - Efficient compression and application of deterministic patterns in a logic BIST architecture

Wohl, Peter, Waicukauski, John A., Patel, Sanjay, Amin, Minesh B.

Year:

2003

Language:

english

File:

PDF, 235 KB

english, 2003

6

Test data compression

McCluskey, E.J., Burek, D., Koenemann, B., Mitra, S., Patel, J., Rajski, J., Waicukauski, J.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 364 KB

english, 2003

7

[IEEE 2012 IEEE 30th VLSI Test Symposium (VTS) - Maui, HI, USA (2012.04.23-2012.04.25)] 2012 IEEE 30th VLSI Test Symposium (VTS) - Enhancing testability by structured partial scan

Wohl, P., Waicukauski, J.A., Colburn, J.E.

Year:

2012

Language:

english

File:

PDF, 502 KB

english, 2012

8

[ACM Press the 54th Annual Design Automation Conference 2017 - Austin, TX, USA (2017.06.18-2017.06.22)] Proceedings of the 54th Annual Design Automation Conference 2017 on - DAC '17 - A New Paradigm for Synthesis of Linear Decompressors

Gizdarski, Emil, Wohl, Peter, Waicukauski, John

Year:

2017

Language:

english

File:

PDF, 663 KB

english, 2017

9

[IEEE 2013 IEEE 31st VLSI Test Symposium (VTS) - Berkeley, CA (2013.4.29-2013.5.2)] 2013 IEEE 31st VLSI Test Symposium (VTS) - Improving test generation by use of majority gates

Wohl, P., Waicukauski, J. A.

Year:

2013

Language:

english

File:

PDF, 602 KB

english, 2013

10

[ACM Press the 41st annual conference - San Diego, CA, USA (2004.06.07-2004.06.11)] Proceedings of the 41st annual conference on Design automation - DAC '04 - Scalable selector architecture for x-tolerant deterministic BIST

Wohl, Peter, Waicukauski, John A., Patel, Sanjay

Year:

2004

Language:

english

File:

PDF, 232 KB

english, 2004

11

[IEEE Comput. Soc. Press International Test Conference 1988 Proceeding@m_New Frontiers in Testing - Washington, DC, USA (12-14 Sept. 1988)] International Test Conference 1988 Proceeding@m_New Frontiers in Testing - Fault detection effectiveness of weighted random patterns

Waicukauski, J.A., Lindbloom, E.

Year:

1988

Language:

english

File:

PDF, 588 KB

english, 1988

12

[IEEE 2010 IEEE International Test Conference (ITC) - Austin, TX, USA (2010.11.2-2010.11.4)] 2010 IEEE International Test Conference - Highly efficient parallel ATPG based on shared memory

Cai, X., Wohl, P., Waicukauski, J.A., Notiyath, P.

Year:

2010

Language:

english

File:

PDF, 1.69 MB

english, 2010

13

[IEEE 2008 IEEE International Test Conference - Santa Clara, CA (2008.10.28-2008.10.30)] 2008 IEEE International Test Conference - Increasing Scan Compression by Using X-chains

Wohl, P., Waicukauski, J.A., Neuveux, F.

Year:

2008

Language:

english

File:

PDF, 993 KB

english, 2008

14

[IEEE Proceedings of 39th Design Automation Conference - New Orleans, LA, USA (2002.6.10-2002.6.14)] Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) - Effective diagnostics through interval unloads in a BIST environment

Wohl, P., Waicukauski, J.A., Patel, S., Maston, G.

Year:

2002

Language:

english

File:

PDF, 653 KB

english, 2002

15

[ACM Press the 47th Design Automation Conference - Anaheim, California (2010.06.13-2010.06.18)] Proceedings of the 47th Design Automation Conference on - DAC '10 - Fully X-tolerant, very high scan compression

Wohl, Peter, Waicukauski, John A., Neuveux, Frederic, Gizdarski, Emil

Year:

2010

Language:

english

File:

PDF, 356 KB

english, 2010

16

Transition Fault Simulation

Waicukauski, John, Lindbloom, Eric, Rosen, Barry, Iyengar, Vijay

Journal:

IEEE Design & Test of Computers

Year:

1987

Language:

english

File:

PDF, 6.13 MB

english, 1987

17

On computing the sizes of detected delay faults

Iyengar, V.S., Rosen, B.K., Waicukauski, J.A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1990

Language:

english

File:

PDF, 1.37 MB

english, 1990

18

[IEEE International Test Conference, 2003. ITC 2003. - Washington, DC, USA (Sept. 30-Oct. 2, 2003)] International Test Conference, 2003. Proceedings. ITC 2003. - X-tolerant compression and application of scan-atpg patterns in a bist architecture

Wohl, P., Waicukauski, J.A., Patel, S., Amin, M.B.

Year:

2003

Language:

english

File:

PDF, 944 KB

english, 2003

19

[IEEE Comput. Soc. Press 14th VLSI Test Symposium - Princeton, NJ, USA (28 April-1 May 1996)] Proceedings of 14th VLSI Test Symposium - Testing "untestable" faults in three-state circuits

Wohl, P., Waicukauski, J., Graf, M.

Year:

1996

Language:

english

File:

PDF, 880 KB

english, 1996

20

Multi-Chip Module Test and Diagnostic Methodology

J. J. Curtin, J. A. Waicukauski

Year:

1983

Language:

english

File:

PDF, 664 KB

english, 1983

21

4687988 Weighted random pattern testing apparatus and method

EdwardB Eichelberger, RogerN Langmaid, Eric Lindbloom, Franco Motika, John Sinchak, JohnA Waicukauski

Journal:

Microelectronics Reliability

Year:

1988

Language:

english

File:

PDF, 180 KB

english, 1988

22

4688223 Weighted random pattern testing apparatus and method

Franco Motika, JohnA Waicukauski

Journal:

Microelectronics Reliability

Year:

1988

Language:

english

File:

PDF, 92 KB

english, 1988

23

[IEEE International Symposium on VLSI Technology, Systems and Applications - Taipei, Taiwan (17-19 May 1989)] International Symposium on VLSI Technology, Systems and Applications - Testing VLSI chips with weighted random patterns

Waicukauski, J.A., Motika, F.

Year:

1989

Language:

english

File:

PDF, 457 KB

english, 1989

24

[Int. Test Conference International Test Conference 1997 - Washington, DC, USA (1-6 Nov. 1997)] Proceedings International Test Conference 1997 - A unified interface for scan test generation based on STIL

Wohl, P., Waicukauski, J.

Year:

1997

Language:

english

File:

PDF, 723 KB

english, 1997

25

[IEEE 2013 IEEE International Test Conference (ITC) - Anaheim, CA, USA (2013.09.6-2013.09.13)] 2013 IEEE International Test Conference (ITC) - Two-level compression through selective reseeding

Wohl, P., Waicukauski, J.A., Neuveux, F., Maston, G.A., Achouri, N., Colburn, J.E.

Year:

2013

Language:

english

File:

PDF, 1.14 MB

english, 2013

26

[IEEE Comput. Soc. Press [1989] 1st European Test Conference - Paris, France (12-14 April 1989)] [1989] Proceedings of the 1st European Test Conference - Built-in self test using perturbed deterministic patterns

Wu, D.M., Waicukauski, J.

Year:

1989

Language:

english

File:

PDF, 315 KB

english, 1989

27

[IEEE International Test Conference - Baltimore, MD, USA (30 Oct.-1 Nov. 2001)] Proceedings International Test Conference 2001 (Cat. No.01CH37260) - Design of compactors for signature-analyzers in built-in self-test

Wohl, P., Waicukauski, J.A., Williams, T.W.

Year:

2001

Language:

english

File:

PDF, 1.09 MB

english, 2001

28

[IEEE 25th IEEE VLSI Test Symmposium - Berkeley, CA, USA (2007.05.6-2007.05.10)] 25th IEEE VLSI Test Symmposium (VTS'07) - Minimizing the Impact of Scan Compression

Wohl, P., Waicukauski, J.A., Kapur, R., Ramnath, S., Gizdarski, E., Williams, T.W., Jaini, P.

Year:

2007

Language:

english

File:

PDF, 233 KB

english, 2007

29

[IEEE 2012 IEEE International Test Conference (ITC) - Anaheim, CA, USA (2012.11.5-2012.11.8)] 2012 IEEE International Test Conference - Hybrid selector for high-X scan compression

Wohl, P., Waicukauski, J. A., Neuveux, F., Colburn, J. E.

Year:

2012

Language:

english

File:

PDF, 491 KB

english, 2012

30

[Int. Test Conference International Test Conference 1998 - Washington, DC, USA (18-23 Oct. 1998)] Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270) - Defining ATPG rules checking in STIL

Wohl, P., Waicukauski, J.

Year:

1998

Language:

english

File:

PDF, 772 KB

english, 1998

31

[IEEE 25th IEEE VLSI Test Symmposium - Berkeley, CA, USA (2007.05.6-2007.05.10)] 25th IEEE VLSI Test Symmposium (VTS'07) - Automated Design and Insertion of Optimal One-Hot Bus Encoders

Wohl, Peter, Waicukauski, A., Patel, Sanjay

Year:

2007

Language:

english

File:

PDF, 184 KB

english, 2007

32

[IEEE 2010 IEEE International Test Conference (ITC) - Austin, TX, USA (2010.11.2-2010.11.4)] 2010 IEEE International Test Conference - Increasing PRPG-based compression by delayed justification

Wohl, P., Waicukauski, J.A., Finklea, T.

Year:

2010

Language:

english

File:

PDF, 420 KB

english, 2010

33

4745355 Weighted random pattern testing apparatus and method

EdwardB Eichelberger, RogerN Langmaid, Eric Lindbloom, Franco Motika, John Sinchak, JohnA Waicukauski

Journal:

Microelectronics Reliability

Year:

1989

Language:

english

File:

PDF, 86 KB

english, 1989

34

THE BIG PICTURE || Learning the Craft

Ronald J. Waicukauski

Journal:

Year:

1998

Language:

english

File:

PDF, 1.34 MB

english, 1998

35

[Int. Test Conference International Test Conference 1996. Test and Design Validity - Washington, DC, USA (20-25 Oct. 1996)] Proceedings International Test Conference 1996. Test and Design Validity - Two-dimensional test data decompressor for multiple scan designs

Zacharia, N., Rajski, J., Tyszer, J., Waicukauski, J.A.

Year:

1996

Language:

english

File:

PDF, 1.01 MB

english, 1996

36

[IEEE 2014 IEEE International Test Conference (ITC) - Seattle, WA, USA (2014.10.20-2014.10.23)] 2014 International Test Conference - Achieving extreme scan compression for SoC Designs

Wohl, Peter, Waicukauski, John A., Colburn, Jonathon E., Sonawane, Milind

Year:

2014

Language:

english

File:

PDF, 830 KB

english, 2014

37

[IEEE International Symposium on VLSI Technology, Systems and Applications - Taipei, Taiwan (17-19 May 1989)] International Symposium on VLSI Technology, Systems and Applications - Logic model optimization for LSSD structures

Huang, S.-H., Forlenza, D., Waicukauski, J., Pete, C.

Year:

1989

Language:

english

File:

PDF, 235 KB

english, 1989

38

A method for generating weighted random test patterns

Waicukauski, J. A., Lindbloom, E., Eichelberger, E. B., Forlenza, O. P.

Journal:

IBM Journal of Research and Development

Year:

1989

Language:

english

File:

PDF, 1.00 MB

english, 1989

39

[Int. Test. Conference IEEE Computer Society International Test Conference (ICSM'99) - Atlantic City, NJ, USA (28-30 Sept. 1999)] International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) - Using Verilog simulation libraries for ATPG

Wohl, P., Waicukauski, J.

Year:

1999

Language:

english

File:

PDF, 889 KB

english, 1999

40

[IEEE 2007 IEEE International Test Conference - Santa Clara, CA, USA (2007.10.21-2007.10.26)] 2007 IEEE International Test Conference - Fully X-tolerant combinational scan compression

Wohl, P., Waicukauski, J.A., Ramnath, S.

Year:

2007

Language:

english

File:

PDF, 487 KB

english, 2007

41

[IEEE IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (1-3 May 1990)] IEEE International Symposium on Circuits and Systems - Built-in test using perturbed deterministic patterns

Wu, D.M., Waicukauski, J.

Year:

1990

Language:

english

File:

PDF, 305 KB

english, 1990

42

[Int. Test Conference International Test Conference 1996. Test and Design Validity - Washington, DC, USA (20-25 Oct. 1996)] Proceedings International Test Conference 1996. Test and Design Validity - A universal technique for accelerating simulation of scan test patterns

Oomman, B.G., Wu-Tung Cheng,, Waicukauski, J.

Year:

1996

Language:

english

File:

PDF, 756 KB

english, 1996

43

[IEEE Comput. Soc. Press International Test Conference 1990 - Washington, DC, USA (10-14 Sept. 1990)] Proceedings. International Test Conference 1990 - ATPG for ultra-large structured designs

Waicukauski, J.A., Shupe, P.A., Giramma, D.J., Matin, A.

Year:

1990

Language:

english

File:

PDF, 748 KB

english, 1990

44

[IEEE Comput. Soc 23rd IEEE VLSI Test Symposium - Palm Springs, CA, USA (1-5 May 2005)] 23rd IEEE VLSI Test Symposium (VTS'05) - Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST

Wohl, P., Waicukauski, J.A., Patel, S., Hay, C., Gizdarski, E., Mathew, B.

Year:

2005

Language:

english

File:

PDF, 154 KB

english, 2005

45

YESTERDAY || Ethos and the Art of Argument

Ronald J. Waicukauski, JoAnne Epps and Paul Mark Sandler

Journal:

Year:

1999

Language:

english

File:

PDF, 1.41 MB

english, 1999

46

[IEEE 2018 IEEE International Test Conference (ITC) - Phoenix, AZ, USA (2018.10.29-2018.11.1)] 2018 IEEE International Test Conference (ITC) - XLBIST: X-Tolerant Logic BIST

Wohl, P., Waicukauski, J.A., Maston, G.A., Colburn, J.E.

Year:

2018

Language:

english

File:

PDF, 37 KB

english, 2018

47

Failure diagnosis of structured VLSI

Waicukauski, J.A., Lindbloom, E.

Journal:

IEEE Design & Test of Computers

Year:

1989

Language:

english

File:

PDF, 880 KB

english, 1989

48

[IEEE Comput. Soc. Press International Test Conference 1988 Proceeding@m_New Frontiers in Testing - Washington, DC, USA (12-14 Sept. 1988)] International Test Conference 1988 Proceeding@m_New Frontiers in Testing - What is the path to fast fault simulation?

Abramovici, M., Krishnamurthy, B., Mathews, R., Rogers, B., Schulz, M., Seth, S., Waicukauski, J.

Year:

1988

Language:

english

File:

PDF, 761 KB

english, 1988

49

[Int. Test Conference International Test Conference 1996. Test and Design Validity - Washington, DC, USA (20-25 Oct. 1996)] Proceedings International Test Conference 1996. Test and Design Validity - Test generation for ultra-large circuits using ATPG constraints and test-pattern templates

Wohl, P., Waicukauski, J.

Year:

1996

Language:

english

File:

PDF, 878 KB

english, 1996

50

[Int. Test Conference International Test Conference 2000 - Atlantic City, NJ, USA (3-5 Oct. 2000)] Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159) - Optimizing the flattened test-generation model for very large designs

Wohl, P., Waicukauski, J.

Year:

2000

Language:

english

File:

PDF, 845 KB

english, 2000

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